Comparative Analysis of Low Leakage SRAM Cell at 32nm Technology
نویسندگان
چکیده
Continuous scaling of the transistor size and reduction of the operating voltage has led to a significant performance improvement of integrated circuits. Low power consumption and smaller area are the most important criteria for the fabrication of DSP systems. Static random access memories (SRAMs) consist of almost 90% of very large scale integrated (VLSI) circuits. The ever-increasing demand for larger data storage capacity has driven the fabrication technology and memory development toward more compact design rules and, consequently, toward higher storage densities. This paper deals with design of low power static random-access memory (RAM) cells and peripheral circuits for standalone RAMs, in 32nm focusing on stable operation and reduced leakage power dissipation. The work is carried out on Tanner Tool version 13 at 32nm technology.
منابع مشابه
A New Low Power 9T SRAM Cell based on CNTFET at 32nm Technology Node
Abstarct---This paper proposes a new design of highly stable and low power SRAM cell using carbon nanotube FETs (CNTFETs) at 32nm technology node. As device physical gate length is reduced to below 65 nm, device non-idealities such as large parameter variations and exponential increase in leakage current make the I-V characteristics substantially different from traditional MOSFETs and become a ...
متن کاملDesign of Low-Leakage CNTFET SRAM Cell at 32nm Technology using Forced Stack Technique
As silicon semiconductor device feature size scales down to the nanometer range, planar bulk CMOS design and fabrication encounter significant challenges nowadays. Carbon Nanotube Field Effect Transistor (CNTFET) has been introduced for high stability, high performance and low power SRAM cell design as an alternative material. Technology scaling demands a decrease in both VDD and VT to sustain ...
متن کاملA Low Leakage 9T SRAM Cell for Ultra-Low Power Operation
This paper presents the design and evaluation of a new SRAM cell made of nine transistors (9T). The proposed 9T cell utilizes a scheme with separate read and write wordlines; it is shown that the 9T cell achieves improvements in power dissipation, performance and stability compared with previous designs (that require 10T and 8T) for low-power operation. The 9T scheme is amenable to small featur...
متن کاملDesign and Analysis of 5-T SRAM Cell in 32nm CMOS and CNTFET Technologies
MOS transistor play a vital role in today VLSI technology. In CMOS based design, symmetry should be followed in circuit operation. Most of the complex circuits are allowed to design in CMOS, however, there are several drawbacks present in this complementary based design. CMOS has lost its credentiality during scaling beyond 32nm. Scaling down causes severe short channel effects which are diffic...
متن کاملNew SRAM Cell Design for Low Power and High Reliability using 32nm Independent Gate FinFET Technology
This paper proposes new methods for SRAM cell design in FinFET technology. One of the most important features of FinFET is that the independent front and back gates can be biased differently to control the current and the device threshold voltage. By controlling the back gate voltage of a FinFET, a SRAM cell can be designed for low power consumption. This paper proposes a new 8T (8 transistors)...
متن کامل